The present invention relates to a radio receiver (or a receiving section of a transceiver), to an integrated circuit embodying those elements of the receiver which are integratable and to a method of operating a radio receiver to reduce power consumption.
In current mobile radio receivers, such as those used for operating in accordance with cellular telephone standards, for example GSM, channel selection is usually carried out using analogue filters, but increasingly digital implementation is being sought to reduce cost and improve flexibility. In principle a relatively wide part of the spectrum containing the wanted signal can be selected by analogue filters, and the final channel detection then performed using DSP techniques. However, the ADC converter must operate at a sufficiently high sampling rate to allow processing of the whole of the band of interest, and the dynamic range must be sufficient for the worst case condition. This occurs where the wanted signal is weak, but the adjacent channel interferers are strong. The power consumption of the ADC is a major problem in this approach, and can be prohibitive. It has been proposed that the power consumption can be reduced using Sigma-Delta converters where adjacent channels can be partly rejected using the decimation filters.
It is an object of the present invention to reduce further the power consumption of a radio receiver, especially a battery powered receiver.
According to a first aspect of the present invention there is provided a receiver comprising at least one analogue-to-digital converter (ADC), means for determining the level of at least the prevailing adjacent channel interference, and means for dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and the wanted signal.
According to a second aspect of the present invention there is provided a receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal for varying the over-sampling rate and/or matching the number of quantization levels selected to the characteristics of the input signal.
The second aspect of the present invention provides a receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(ADC), said ADC comprising a signal combiner having first and second inputs and an output, the intermediate frequency signal being coupled to the first input, analogue filtering means coupled to said output, an over-sampling quantizer coupled to an output of the analogue filtering means, the over-sampling quantizer having an output which is coupled to digital filtering means which provides an output signal, a digital to analogue converter having an input coupled to the output of the over-sampling quantizer and an output coupled to the second input of the signal combiner which produces the difference between the signals on its first and second inputs as an output, wherein the over-sampling quantizer has a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal are provided for varying the over-sampling rate and/or matching the number of quantization levels selected to the characteristics of the input signal.
In an embodiment of the present invention the intermediate frequency may be a zero IF or a low IF corresponding to say half the channel bandwidth.
According to a third aspect of the present invention there is provided a method of operating a receiver having at least one analogue to digital converter(ADC), comprising determining the level of prevailing interference and dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and the wanted signal.
According to a fourth aspect of the present invention there is provided an integrated circuit comprising at least one analogue-to-digital converter(ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of an input signal to the ADC for varying the over-sampling rate and/or matching the number of quantization levels selected to the characteristics of the input signal.
The present invention is based on the principle that the average power consumption of the ADC can be reduced by dynamically adjusting the resolution of the ADC such that it is no larger than is required to handle the prevailing interference and recover the wanted signal after processing. Typically, adjacent channels are of similar amplitude to the wanted signal. In such a case the required resolution may be small, for example 8 bits. In the worst case a much larger dynamic range may be needed, for example 14 bits, leading to an increase in the power consumption.
The ADC may comprise a Sigma-Delta ADC.
U.S. Pat. No. 5,550,544 discloses a first order Delta-Sigma ADC in which an input signal is compared with each of a plurality of preset (nxe2x88x921) reference levels and is quantized into one of n-digital output signals. Thus when the amplitude of an input signal is small, the amplitude of a difference signal between the input signal entered into the quantizer and an output signal therefrom, that is the quantization noise, is small.
By the receiver in accordance with the present invention being able to control the number of quantization levels relative to the dynamic range of an input signal, fewer comparisons have to be made in the case of smaller amplitude signals thus saving current compared to the solution taught in U.S. Pat. No. 5,550,544.
In an embodiment of the present invention means are provided for estimating the required characteristics, such as dynamic range. These means may comprise filters before or within the ADC structure to measure directly the energies in the wanted and unwanted bands.